1. Field of the Invention
This invention relates to ceramic integrated circuit packages, and more particularly to a ceramic chip-resistant chamfered integrated circuit package and an apparatus for and method of manufacture thereof.
2. Description of Related Art
Plastic and ceramic packages have long been used in the industry to hermetically house and protect electronic integrated circuits (IC's). More recently, ceramic packages have become the package of choice for large IC's due to the generally superior properties (including heat resistance) of ceramics over plastics.
FIG. 1 shows a prior art ceramic package. The ceramic package comprises a relatively thick rectangular base 1 and a matching relatively thin rectangular cap 2 bonded together by a sealing material 3 such as glass. Connecting pins 4 embedded in the sealing material 3 provide electrical contacts to an IC housed within the ceramic package.
However, one aspect of ceramic packages that is inferior to plastic packages is susceptibility to chipping. While the ceramic materials used in ceramic packages are very hard, such materials also tend to be brittle. During manufacture, handling, and use, especially in automated equipment, ceramic packages often are handled in groups, and frequently hit each other. In particular, ceramic packages are often stacked end-to-end in handling tubes, where the surfaces most susceptible to chipping are positioned for repeated striking as the tubes are moved around, or as the ceramic packages move within the tubes. As a consequence, chipping of the ends of ceramic packages is not uncommon.
Chipping of a ceramic piece can be defined as a fast fracture initiated and completed within the vicinity of a surface, edge, or corner of the piece. A fast fracture in ceramic materials involves a stress concentrator within the ceramic material (such as a micro-crack, micro-void, or inclusion) and an external stress applied to the ceramic that is less than the general yielding stress for the defect-free ceramic. A sufficient external stress causes catastrophic failure of the ceramic around and near the stress concentrator, leading to a complete fracture.
Most chips occur at edges and corners, which are the weakest points of a ceramic package. Smaller chips occur more frequently because a smaller amount of energy is required to fracture the ceramic. Referring to FIG. 1, leading types of chips include bulk chips 5 (i.e., involving relatively large chunks of fractured ceramic, such as broken corners), flakes 6 (relatively flat pieces from surfaces), and silvers 7 (relatively small pieces from edges). Flakes 6 and silvers 7 are the most common types of chips that occur during use and handling of ceramic packages in handling tubes. (Also shown in FIG. 1 is an orientation notch A common to most ceramic packages).
Chipping is considered to be a problem in the electronics industry because chipped packages are susceptible to further chipping, and ultimately failure of the hermetic environment of the housed IC. In addition, customers for such IC's prefer to have undamaged ceramic packages for cosmetic reasons.
Many efforts have been made to reduce the number of stress concentrators in ceramic packages. Unfortunately, today's ceramics still contain micro-voids despite various combinations of materials and manipulations of the microstructure during manufacture.
Therefore, a need exists for a ceramic package design that is chip resistant, particularly with respect to end-to-end strikes. In the past, attempts have been made to apply "bumper" tapes to the ends of ceramic packages to prevent end-strike chips during handling. The bumper tapes are typically removed afterwards. However, applying and then removing bumper tapes is time-consuming and relatively expensive. Another technique in common use is to form one or more "steps" 8 on exposed-surface edges (see FIG. 1). This primarily protects against chipping due to random hits by creating multiple hitting points, thus spreading the energy of a strike. However, edge steps do not appreciably reduce chips caused by multiple end-strikes.
Rounding corners and making the components (cap and/or base) of a ceramic package thicker reduces chipping, particularly bulk chips, but does not significantly reduce flaking and silvering caused by end-strikes.
Another approach to reducing end-strike chips that was attempted some years ago was to mechanically grind chamfers into the exposed-surface edges of each short end of a ceramic package (before or after firing) at an angle of about 67.degree.. However, such machining is time-consuming, expensive, and wasteful of material.
Thus, a need exists for an economical and effective method of manufacturing ceramic packages that are chip resistant, particularly with respect to end-to-end strikes. The present invention provides such a design, and an apparatus and method for manufacturing the design.